Samsung announces roadmap to 4nm semiconductors
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- AnonD-625786
- nYS
- 27 May 2017
This is truly exciting. We're on a path to an incredible future in terms of technology!
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- Polius
- HjB
- 26 May 2017
Muthu, 25 May 2017His question was - In which year, SoC will be mass-produced... moreIts common sense. You seriously dont know? Look up their past roadmap. Do your research.
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- Simon
- NU0
- 26 May 2017
When? Of course they are, everyone is. The critical and only relevant information that was not given is when. Their roadmaps until 2019-2020 are just about 7nm.
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- Anonymous
- 4S2
- 25 May 2017
As expected from European investment in Samsung.
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- TechLover1
- LfN
- 25 May 2017
Haha excellent news, absolutely looking forward. Better sooner rather than later. Keep it up to Samsung then.
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- AnonD-602748
- wrX
- 25 May 2017
wow... just wow. atleast i'm able to enjoy 4nm in my lifetime
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- ZolaIII
- S9u
- 25 May 2017
AlienNextDoor, 25 May 2017Where are the graphene cpus? I couldn't care less about ... moreIn the scientific works & labs still much closer to SF than reality. If it it gets used on something anytime soon it will be on quantum computing which won't be a consumer product in very long time. You are lucky if you see even Germanium at the end of FinFET & with EUV...
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- AnonD-617820
- x7u
- 25 May 2017
That's too fast
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- .alpha
- ytx
- 25 May 2017
Anonymous, 25 May 2017I'm happy that the evolution goes on. But it's sad that my ... more@Anonymous
There is little difference between Samsung 14nm and TSMC 16nm process. The die produced are nearly the same size because Samsung only use 14nm on certain part of the chip while TSMC uses more 16nm. Both are also producing on 10nm this year
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- Anonymous
- JK1
- 25 May 2017
Antimr, 25 May 2017Graphene?Seriously first make graphene armour then try tran... more3 years ago: https://www.extremetech.com/extreme/175727-ibm-builds-graphene-chip-thats-10000-times-faster-using-standard-cmos-processes
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- vaz
- ps@
- 25 May 2017
Antimr, 25 May 2017Graphene?Seriously first make graphene armour then try tran... moreNot correct. There are graphene batteries
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- Antimr
- PEr
- 25 May 2017
AlienNextDoor, 25 May 2017Where are the graphene cpus? I couldn't care less about ... moreGraphene?Seriously first make graphene armour then try transistor.Till now graphene has been useless for anything outside a lab even there no encouraging results.
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- Anonymous
- AIA
- 25 May 2017
This is where the dellusions start
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- AnonD-244086
- nDW
- 25 May 2017
road to 1nm
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- AnonD-497816
- fwy
- 25 May 2017
Samsung only
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- Anonymous
- 043
- 25 May 2017
I'm happy that the evolution goes on. But it's sad that my A10 Fusion is still based on 16nm, even though 10nm was just around the corner (so at least 14nm would have been possible)
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- Muthu
- 9Ki
- 25 May 2017
Polius, 25 May 20178LPP (8nm Low Power Plus): 8LPP provides the most competiti... moreHis question was - In which year, SoC will be mass-produced with 8nm, 7nm etc? There is just no mention about it and then the title says "Roadmap". Weird indeed.
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- Polius
- HjB
- 25 May 2017
nh1402, 25 May 2017So..... Where's the roadmap?8LPP (8nm Low Power Plus): 8LPP provides the most competitive scaling benefit before transitioning to EUV (Extreme Ultra Violet) lithography. Combining key process innovations from Samsung’s 10nm technology, 8LPP offers additional benefits in the areas of performance and gate density as compared to 10LPP.
7LPP (7nm Low Power Plus): 7LPP will be the first semiconductor process technology to use an EUV lithography solution. 250W of maximum EUV source power, which is the most important milestone for EUV insertion into high volume production, was developed by the collaborative efforts of Samsung and ASML. EUV lithography deployment will break the barriers of Moore’s law scaling, paving the way for single nanometer semiconductor technology generations.
6LPP (6nm Low Power Plus): 6LPP will adopt Samsung’s unique Smart Scaling solutions, which will be incorporated on top of the EUV-based 7LPP technology, allowing for greater area scaling and ultra-low power benefits.
5LPP (5nm Low Power Plus): 5LPP extends the physical scaling limit of FinFET structure by implementing technology innovations from the next process generation, 4LPP, for better scaling and power reduction.
4LPP (4nm Low Power Plus): 4LPP will be the first implementation of next generation device architecture – MBCFETTM structure (Multi Bridge Channel FET). MBCFETTM is Samsung’s unique GAAFET (Gate All Around FET) technology that uses a Nanosheet device to overcome the physical scaling and performance limitations of the FinFET architecture.
FD-SOI (Fully Depleted – Silicon on Insulator): Well suited for IoT applications, Samsung will gradually expand its 28FDS technology into a broader platform offering by incorporating RF (Radio Frequency) and eMRAM(embedded Magnetic Random Access Memory) options. 18FDS is the next generation node on Samsung’s FD-SOI roadmap with enhanced PPA (Power/Performance/Area).
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- AlienNextDoor
- JK1
- 25 May 2017
Where are the graphene cpus?
I couldn't care less about minor meaningless upgrades every year.
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- nh1402
- mqp
- 25 May 2017
So..... Where's the roadmap?