AMD unveils EPYC Milan-X processors with up to 768MB of L3 cache per socket

AMD announced the first official details for the Milan-X chips – a modification of the EPYC Milan server processors with 3D-stacked L3 cache (dubbed 3D V-Cache), which can be up to 768 MB in size. That massive hunk of cache can speed up workloads by 50% on average.

The way it works is that every Zen 3 chiplet inside the EPYC Milan-X processors will have 64 MB of 7 nm SRAM stacked on top, which is in addition the 32 MB of L3 that are already on the chiplet itself. Obviously, the final L3 capacity is tied to the number of chiplets and therefor to the number of processor cores.

According to AMD, the 3D V-Cache can improve gaming performance by 15%, but today’s announcement with the Milan-X processors is focused data centers. Microsoft’s Azure cloud platform will be offering them and posted benchmarks. First, here is a comparison with other server processors:

Compared to the regular Milan offerings, the memory latency has been lowered by 51% within a NUMA node and 42% lower between nodes.

Here come some benchmarks. You can read more details in Microsoft’s blog post on the new server processors.

AMD EPYC Milan-X benchmarks by Microsoft's Azure

The AMD EPYC Milan-X processors will arrive in the first quarter of 2022, but some are available in preview instances on Azure. These processors are drop-in compatible after a BIOS upgrade. There will be 16, 32 and 64 core versions (each with SMT, so two threads per core) with 192 MB, 384 MB and 768 MB of L3 cache, respectively. The full details about each processor will be announced at a later date.

Source | Via